摘 要
目前，GNSS（Global Navigation Satellite System）衛(wèi)星導(dǎo)航定位技術(shù)正在快速發(fā)展，其在測繪、導(dǎo)航、天文、通訊等多個領(lǐng)域的應(yīng)用也正在推廣，許多國家地區(qū)都在積極的開發(fā)和應(yīng)用GNSS接收機。國外的一些公司和研究機構(gòu)已擁有篅@墑斕腉NSS接收機研制技術(shù)；而我國大部分GNSS的應(yīng)用設(shè)計還需要依賴國外OEM產(chǎn)品。正逢北斗衛(wèi)星導(dǎo)航系統(tǒng)建設(shè)部署之際，為了實現(xiàn)導(dǎo)航接收機自主創(chuàng)新和對北斗導(dǎo)航系統(tǒng)的支持，研制適合北斗系統(tǒng)并兼容其他導(dǎo)航系統(tǒng)的自主高性能GNSS接收機已成為必然。
本文以原公司有關(guān)GNSS接收機的研發(fā)設(shè)計為研究背景，在對接收機設(shè)計整體把握的基礎(chǔ)上，實現(xiàn)了基于現(xiàn)場可編程邏輯門陣列（FPGA）和高速數(shù)字信號處理器（DSP）嵌入式北斗/GPS兼容型接收機的設(shè)計，選擇TMS320C6747作為平臺進行系統(tǒng)開發(fā)，通過基帶環(huán)路的改進設(shè)計，并選擇使用最為廣泛的最小二乘算法為導(dǎo)航算法，提高接收機的捕獲、跟蹤性能和導(dǎo)航解算速度。主要進行了基帶部分的設(shè)計與程序移值，并在系統(tǒng)設(shè)計完成后進行了射頻、基帶部分的測試以及整機靜態(tài)、動態(tài)和耐高低溫、抗沖擊振動試驗，經(jīng)過試驗和充分的數(shù)據(jù)分析比對，證實本文設(shè)計的接收機已達到了商用接收機的性能要求，具有尺寸小、精度高、動態(tài)性能好、耐高低溫和抗沖擊等特點。
論文主要工作包括以下幾方面內(nèi)容：
1.研究GNSS衛(wèi)星導(dǎo)航定位的基本原理及定位信息的解算過程，針對本課題所設(shè)計系統(tǒng)選取適合的導(dǎo)航算法，并對接收機的捕獲、跟蹤環(huán)路進行研究和改進設(shè)計。
2.研究北斗/GPS雙模接收機的整體結(jié)構(gòu)，掌握各個模塊的功能及實現(xiàn)方法；掌握嵌入式系統(tǒng)開發(fā)的基本方法，根據(jù)系統(tǒng)對DSP芯片的性能要求，選出適合本系統(tǒng)的DSP芯片并進行接收機基帶部分程序移植。
3.在一款基于DSP的開發(fā)板上搭建嵌入式系統(tǒng)平臺：包括微處理器及外圍電路、存儲器、RS232串口等硬件調(diào)試平臺的建立。
4.在硬件設(shè)計的基礎(chǔ)上，對系統(tǒng)軟件進行設(shè)計，包括DSP應(yīng)用軟件的開發(fā)、基于DSP/BIOS的多任務(wù)設(shè)計、中斷服務(wù)子程序的設(shè)計等，并在上述平臺上進行驗證。
5.分別對所設(shè)計系統(tǒng)的射頻前端、基帶環(huán)路進行測試，并對系統(tǒng)整體進行動、靜態(tài)和高低溫、抗沖擊測試試驗。最后對試驗數(shù)據(jù)分析并進行性能比較，得出結(jié)論。
本文立足于接收機系統(tǒng)的實時性、高效性、可靠性，提出并完成基于FPGA與 DSP嵌入式北斗/GPS兼容型接收機設(shè)計，期待能夠為以后的北斗/GPS雙模接收機技術(shù)研究提供可以借鑒的研究方法和實現(xiàn)過程。
關(guān)鍵詞 GNSS接收機；FPGA；DSP；北斗/GPS兼容；測試試驗；
Abstract
At present, the GNSS satellite navigation and positioning technology is rapidly developing, being applied broadly in mapping, navigation, astronomy and communication, many countries are actively developing and applying GNSS receiver. Some overseas companies and research institutes have been equipped with mature GNSS receiver development technology, however, most of our country's application of GNSS still rely on foreign countries' OEM products. Coming across the deployment of the construction of Beidou satellite navigation system, in order to realize the innovation and of the navigation receiver and support the Beidou satellite navigation system, it is inevitable to develop the independent innovative and high-performance GNSS receiver which is suitable to the Beidou satellite navigation system and compatible with other navigation system.
This thesis is unfolded against the background of the research and design of GNSS. Based on the whole master of the receiver design, it realizes the Beidou/GPS bimodal receiver design in view of the live FPGA and DSP, it chooses the TMSC6747 as the platform for systematic exploitation with the high speed parallel FPGA as the baseband loop partial management. Through the improved design of the baseband loop, choosing the most popular two multiplication algorithm of Navigation algorithms, improving the function of capture, monitor and navigating. After the design of baseband loop, we have the test of RF, baseband loop and action, static state, temperature, and impact resistance tests, and at last a conclusion will be drawn through the analysis and compassion of the data, which has approved that our receiver has meet the need of commercial function, consisting the properties of smaller size, high accuracy, better motivity, anti-high temperature and anti-shock.
This thesis mainly includes the following contents:
1. To study the fundamental principle of GNSS satellite navigation, positioning, and the decoding process of positioning. Based on the systems designed in this task, the appropriate navigation algorithms will be chosen. What is more, the capture and tracking loop of the receiver will also be studied and improved.
2. By studying the integral structure of Beidou/GPS bimodal receiver, the thesis aims to master the functions and implementation methods of each module, the basic method of embedded system exploiting. What is more, based on performance requirements for DSP chip, the appropriate chip will be chosen out and the transplanting of Receiver’s baseband parts will be simultaneously performed
3. To set up an embedded system platform for on one kind of development board which is based on DSP, and the platform includes the establishment of hardware debugging platform (hardware includes microprocessor, peripheral circuit, memorizer and RS232 serial port).
4. Except for the hardware design, the system software design is also p..